A practical OpenMP compiler for system on chips

DOI10.1007/3-540-45009-2_5MaRDI QIDQ4442147zbMATH OpenFDO

Authors Feng Liu, Vipin Chaudhary

Publication date 20 January 2004

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL http://link.springer.de/link/service/series/0558/bibs/2716/27160054.htm

Mathematics Subject Classification ID

Other programming paradigms (object-oriented, sequential, concurrent, automatic, etc.) (68N19) Theory of compilers and interpreters (68N20) Computing methodologies and applications (68U99)

Recommendations

• Performance characteristics for OpenMP constructs on different parallel computer architectures
• Evolution of MPP SoC architecture techniques
• Integrating OpenMP into janus
• Compilers for high performance (compilation and parallelization techniques)
• Portable compilers for OpenMP

Cited in

(7)

• Scalability and parallel execution of warp processing: Dynamic hardware/software partitioning
• Architectural exploration of heterogeneous multiprocessor systems for JPEG
• Parallel programming of multi-processor soC: A HW-SW interface perspective
• Automatic task generation for the multi-level computing architecture
• OpenMP and compilation issue in embedded applications
• An OpenMP Compiler for Efficient Use of Distributed Scratchpad Memory in MPSoCs
• Evolution of MPP SoC architecture techniques

Describes a project that uses

Uses Software

• OdinMP/CCp

This page was built for publication: A practical OpenMP compiler for system on chips

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4442147)