Algorithmic Aspects of MOS VLSI Switch-Level Simulation with Race Detection

DOI10.1109/TC.1986.1676789MaRDI QIDQ3720477zbMATH OpenOpenAlexFDO

Authors Vijaya Ramachandran

Publication date 1986

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.1986.1676789

zbMATH Keywords

computer-aided designgraph algorithmslinear-time simulationNP- completeness

Mathematics Subject Classification ID

Analysis of algorithms and problem complexity (68Q25) Applications of graph theory to circuits and networks (94C15)

Recommendations

• scientific article; zbMATH DE number 3906402
• scientific article; zbMATH DE number 3910302
• Efficient VLSI fault simulation
• Gate circuits in the algebra of transients
• scientific article; zbMATH DE number 4043765

Cited in

(4)

• scientific article; zbMATH DE number 3906402 (Why is no real title available?)
• scientific article; zbMATH DE number 3910302 (Why is no real title available?)
• scientific article; zbMATH DE number 3956984 (Why is no real title available?)
• On the existence of speed-independent circuits

This page was built for publication: Algorithmic Aspects of MOS VLSI Switch-Level Simulation with Race Detection

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3720477)