An efficient topology-based algorithm for transient analysis of power grid

DOI10.1007/978-3-319-22180-9_65MaRDI QIDQ1990352zbMATH OpenOpenAlexFDO

Authors Lan Yang, Jingbin Wang, Lorenzo Azevedo, Jim Jing-Yan Wang

Publication date 25 October 2018

Full work available at URL https://arxiv.org/abs/1409.7166

zbMATH Keywords

nodal analysispositive semi-definitepower gridtopology

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

Abstract: In the design flow of integrated circuits, chip-level verification is an important step that sanity checks the performance is as expected. Power grid verification is one of the most expensive and time-consuming steps of chip-level verification, due to its extremely large size. Efficient power grid analysis technology is highly demanded as it saves computing resources and enables faster iteration. In this paper, a topology-base power grid transient analysis algorithm is proposed. Nodal analysis is adopted to analyze the topology which is mathematically equivalent to iteratively solving a positive semi-definite linear equation. The convergence of the method is proved.

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