An integrated systolic array design for video compression

DOI10.1023/A:1021106204987MaRDI QIDQ1405480zbMATH OpenOpenAlexFDO

Authors Pol Lin Tai, Chii Tung Liu, Jia-Shung Wang

Publication date 25 August 2003

Published in Journal of VLSI signal processing systems for signal, image and video technology (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1023/a:1021106204987

zbMATH Keywords

wavelet transformvector quantizationblock-matchingintegrated systolic design

Mathematics Subject Classification ID

Computing methodologies for image processing (68U10) Coding and information theory (compaction, compression, models of communication, encoding schemes, etc.) (aspects in computer science) (68P30) Computer system organization (68M99)

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Cited in

(2)

• A parametric VLSI architecture for video motion estimation
• Scalable linear array architecture with data-driven control for ultrahigh-speed vector quantization

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