Analog/mixed-signal circuit verification using models generated from simulation traces

DOI10.1142/S0129054110007209MaRDI QIDQ3552520zbMATH OpenOpenAlexWikidataFDO

Authors

Publication date 22 April 2010

Published in International Journal of Foundations of Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1142/s0129054110007209

zbMATH Keywords

abstract model generationanalog/mixed-signal circuitsformal methodshybrid Petri nets

Mathematics Subject Classification ID

Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)

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Cites work

• On hybrid Petri nets

Cited in

(7)

• Simulation and Verification of Electronic and Biological Systems
• Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver
• Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces
• Automated Technology for Verification and Analysis
• Hardware and Software, Verification and Testing
• On simulation-based probabilistic model checking of mixed-analog circuits
• Semi-formal verification of the steady state behavior of mixed-signal circuits by SAT-based property checking

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