On simulation-based probabilistic model checking of mixed-analog circuits

DOI10.1007/S10703-009-0076-YMaRDI QIDQ5962116zbMATH OpenOpenAlexFDO

Authors Edmund Clarke, Alexandre Donzé, Axel Legay

Publication date 16 September 2010

Published in Formal Methods in System Design (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s10703-009-0076-y

zbMATH Keywords

delta-sigma modulatorsmixed-signals circuits verificationprobabilistic model-checkingsimulation-based techniques

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60)

Recommendations

• Formal Methods in Computer-Aided Design
• Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces
• Analog/mixed-signal circuit verification using models generated from simulation traces
• Semi-formal verification of the steady state behavior of mixed-signal circuits by SAT-based property checking
• Automated Technology for Verification and Analysis

Cites work

• Checking Temporal Properties of Discrete, Timed and Continuous Behaviors
• Computer Aided Verification
• Computer Aided Verification
• Computer Aided Verification
• Computer Aided Verification
• scientific article; zbMATH DE number 1905115 (Why is no real title available?)
• Linear Encodings of Bounded LTL Model Checking
• Monitoring of Real-Time Properties
• On the stability of sigma delta modulators
• Sequential Tests of Statistical Hypotheses
• Statistical probabilistic model checking with a focus on time-bounded properties
• The complexity of probabilistic verification
• Validation of Stochastic Systems
• Verification, Model Checking, and Abstract Interpretation

Cited in

(11)

• On minimising the maximum expected verification time
• On checking equivalence of simulation scripts
• Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces
• Analog/mixed-signal circuit verification using models generated from simulation traces
• A uniform approach to mixed-signal circuit test
• Simulator semantics for system level formal verification
• Automated Technology for Verification and Analysis
• Formal Methods in Computer-Aided Design
• Analog property checkers: a DDR2 case study
• Probabilistic contracts: a compositional reasoning methodology for the design of systems with stochastic and/or non-deterministic aspects
• Semi-formal verification of the steady state behavior of mixed-signal circuits by SAT-based property checking

Describes a project that uses

Uses Software

• PRISM
• AMT
• LiQuor
• Ymer
• Delta Sigma

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