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AMT

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swMATH38045MaRDI QIDQ53745FDOQ53745


Author name not available (Why is that?)

Official website: https://link.springer.com/chapter/10.1007/978-3-540-75454-1_22




Cited In (22)

  • Continuous valuations of temporal logic specifications with applications to parameter optimization and robustness measures
  • On temporal logic constraint solving for analyzing numerical data time series
  • Runtime enforcement of timed properties revisited
  • Formal system verification. State-of the-art and future trends
  • FoCs
  • PASS
  • S-TaLiRo
  • Delta Sigma
  • Rapture
  • Breach
  • Copilot
  • iscasMc
  • ASDeX
  • POWER-TRUCTOR
  • A brief account of runtime verification
  • Localizing Faults in Simulink/Stateflow Models with STL
  • On simulation-based probabilistic model checking of mixed-analog circuits
  • Analog property checkers: a DDR2 case study
  • STL*: extending signal temporal logic with signal-value freezing operator
  • Robust online monitoring of signal temporal logic
  • Algorithms for monitoring real-time properties
  • ModelPlex: verified runtime validation of verified cyber-physical system models


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