Analyzing the Effect of Clock Jitter on Self-Oscillating Sigma Delta Modulators

DOI10.1109/TCSI.2015.2512738MaRDI QIDQ5007263zbMATH OpenFDO

Authors Dries Vercaemer, Pieter Rombouts

Publication date 26 August 2021

Published in IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TCSI.2015.2512738

Mathematics Subject Classification ID

Signal theory (characterization, reconstruction, filtering, etc.) (94A12)

Cited in

(5)

• Modeling of jitter in bang-bang clock and data recovery circuits
• Constraints on constant-input oscillations of a bandpass sigma-delta modulator structure
• Mathematical model for the output signal's energy of an ideal DAC in the presence of clock jitter
• Phase Noise Effect on Sine-Shaped Feedback DACs Used in Continuous-Time <formula formulatype="inline"><tex Notation="TeX">$\Sigma\Delta$</tex></formula> ADCs
• Spectral analysis of timing jitter effects on the cyclostationary PPM format

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