Automatic design error correction of combinatorial circuits

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This book is the doctoral dissertation of the author at the University of Tübingen. It studies automatic design error correction for combinatorial circuits. The motivation is the high complexity of VLSI circuit designs that require millions of gates. The scope of the dissertation is the development of a method for performing automatic error localization and correction of combinatorial circuits at the gate level. Various verification and validation methods are proposed to minimize the number of design errors throughout the different stages of the hardware design cycle.











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