Bit-Width Optimization by Divide-and-Conquer for Fixed-Point Digital Signal Processing Systems
From MaRDI portal
Recommendations
- Integer linear programming-based bit-level optimization for high-speed FIR decimation filter architectures
- An Optimization Approach to Single-Bit Quantization
- Optimal index-bit allocation for dynamic post-correction of analog-to-digital converters
- On computational aspects of certain optimal digital signal processing algorithms
- A Bit-Width Optimization Methodology for Polynomial-Based Function Evaluation
- Fast and efficient bit-level precision tuning
- Fixed-Point Analysis and Parameter Optimization of the Radix-<formula formulatype="inline"><tex Notation="TeX">$2^{k}$</tex> </formula> Pipelined FFT Processor
- Reducing the Computation Time in (Short Bit-Width) Two's Complement Multipliers
This page was built for publication: Bit-Width Optimization by Divide-and-Conquer for Fixed-Point Digital Signal Processing Systems
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q2985762)