CAIRN 2

MaRDI QIDQ37202swMATHFDO

Official website https://link.springer.com/chapter/10.1007/978-3-540-74735-2_25

Described by source

• CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method

Cited in

(1)

• Computational hardness of IFP and ECDLP

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