Compiler construction using LOTOS NT
From MaRDI portal
Cited in
(7)- On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP
- Formal modelling and verification of GALS systems using GRL and CADP
- Computation Tree Regular Logic for Genetic Regulatory Networks
- Parallel Processes with Real-Time and Data: The ATLANTIF Intermediate Format
- Automatic distributed code generation from formal models of asynchronous processes interacting by multiway rendezvous
- Translating FSP into LOTOS and networks of automata
- Revisiting sequential composition in process calculi
This page was built for publication: Compiler construction using LOTOS NT
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4738368)