Component refinement and CSC solving for STG decomposition

DOI10.1007/978-3-540-31982-5_22MaRDI QIDQ5705893zbMATH OpenOpenAlexFDO

Authors Mark Schaefer, Walter Vogler

Publication date 10 November 2005

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/b106850

Mathematics Subject Classification ID

Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)

Recommendations

• Component refinement and CSC-solving for STG decomposition
• Decomposition in asynchronous circuit design
• Improved decomposition of signal transition graphs
• Determinate STG decomposition of marked graphs
• Decomposition in asynchronous circuit design

Cited in

(9)

• STG decomposition strategies in combination with unfolding
• Component refinement and CSC-solving for STG decomposition
• Avoiding irreducible CSC conflicts by internal communication
• Effective Contraction of Timed STGs for Decomposition Based Timed Circuit Synthesis
• Combining Decomposition and Unfolding for STG Synthesis
• Decomposition in asynchronous circuit design
• scientific article; zbMATH DE number 2112982 (Why is no real title available?)
• Improved decomposition of signal transition graphs
• Determinate STG decomposition of marked graphs

This page was built for publication: Component refinement and CSC solving for STG decomposition

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q5705893)