FAST: FFT ASIC automated synthesis

DOI10.1016/S0167-9260(02)00052-4MaRDI QIDQ4788456zbMATH OpenFDO

Authors Luca Fanucci, M. Forliti, Pierangelo Terreni

Publication date 22 January 2003

Published in Integration (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/S0167-9260(02)00052-4

zbMATH Keywords

automatic design methodologiesdigital signal processingfast Fourier transformhigh-speed integrated circuitsvery large-scale integrationVLSI architectures

Mathematics Subject Classification ID

Computer system organization (68M99) Signal theory (characterization, reconstruction, filtering, etc.) (94A12)

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Cited in

(4)

• Algorithm based fault tolerant synthesis for linear operations
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• World’s Fastest FFT Architectures: Breaking the Barrier of 100 GS/s
• High Performance Computing for Computational Science - VECPAR 2004

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