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swMATH10071MaRDI QIDQ22040FDOQ22040

Author name not available (Why is that?)

Official website: http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=580111

Cited In (14)

• Formal Methods for Hardware Verification
• Efficient combinational verification using overlapping local BDDs and a hash table
• Title not available (Why is that?)
• A BDD-based verification method for large synthesized circuits
• Formal verification based on Boolean expression diagrams
• Test Pattern Generation using Boolean Proof Engines
• CirCUs
• SATORI
• HITEC
• Pinapa
• PASSAT
• SOCRATES
• Robustness and usability in modern design flows
• GreyHound: A methodology for utilizing datapath regularity in standard design flows

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