Hardware Private Circuits: From Trivial Composition to Full Verification
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(24)- Towards tight random probing security
- Resilient uniformity: applying resiliency in masking
- Proof producing synthesis of arithmetic and cryptographic hardware
- Composable Security in the Tamper-Proof Hardware Model Under Minimal Complexity
- Effective and efficient masking with low noise using small-Mersenne-prime ciphers
- A holistic approach towards side-channel secure fixed-weight polynomial sampling
- Handcrafting: improving automated masking in hardware with manual optimizations
- Energy consumption of protected cryptographic hardware cores. An experimental study
- \texttt{POLKA}: towards leakage-resistant post-quantum CCA-secure public key encryption
- Secret can be public: low-memory AEAD mode for high-order masking
- Towards automating cryptographic hardware implementations: a case study of HQC
- Unifying freedom and separation for tight probing-secure composition
- Automated verification of correctness for masked arithmetic programs
- Quantitative fault injection analysis
- Generalized Feistel ciphers for efficient prime field masking
- Leakage-tolerant circuits
- \textsf{LR-OT}: leakage-resilient oblivious transfer
- IP masking with generic security guarantees under minimum assumptions, and applications
- StaMAC: fault protection via stable-MAC tags
- ProverNG: efficient verification of compositional masking for cryptosystem's side-channel security
- INDIANA -- verifying (random) probing security through indistinguishability analysis
- LR-OT: leakage-resilient oblivious transfer
- Authenticity in the presence of leakage using a forkcipher
- Fly away: lifting fault security through canaries and the uniform random fault model
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