High-Performance Modular Multiplication on the Cell Processor
From MaRDI portal
Recommendations
- Topics in Cryptology – CT-RSA 2004
- Performance-scalable array architectures for modular multiplication
- A New Algorithm for High-Speed Modular Multiplication Design
- scientific article; zbMATH DE number 2089179
- scientific article; zbMATH DE number 1878333
- Fast Parallel Arithmetic via Modular Representation
- An ultrafast cellular method for matrix multiplication
- scientific article; zbMATH DE number 1882357
Cited in
(6)- Fast cryptography in genus 2
- Montgomery multiplication using vector instructions
- A binary algorithm with low divergence for modular inversion on SIMD architectures
- Phirsa: exploiting the computing power of vector instructions on Intel Xeon Phi for RSA
- Montgomery modular multiplication on ARM-NEON revisited
- A Mixed-Mode Polynomial Cellular Array Processor Hardware Realization
This page was built for publication: High-Performance Modular Multiplication on the Cell Processor
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3578462)