High-Radix Design of a Scalable Montgomery Modular Multiplier With Low Latency

DOI10.1109/TC.2021.3052999MaRDI QIDQ3390268zbMATH OpenOpenAlexFDO

Authors Bo Zhang, Zeming Cheng, Massoud Pedram

Publication date 24 March 2022

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.2021.3052999

Mathematics Subject Classification ID

Computer science (68-XX)

Cited in

(4)

• A versatile Montgomery multiplier architecture with characteristic three support
• Circuit level realization of low latency radix-4 Booth scheme for parallel multipliers
• A Low-Complexity High-Radix RNS Multiplier
• Scalable Montgomery Modular Multiplication Architecture with Low-Latency and Low-Memory Bandwidth Requirement

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