High-Speed Multiprocessors and Compilation Techniques

DOI10.1109/TC.1980.1675676MaRDI QIDQ3880778zbMATH OpenFDO

Authors David Padua, David Kuck, Duncan H. Lawrie

Publication date 1980

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TC.1980.1675676

zbMATH Keywords

automatic translation of sequential programs into parallel programscompilercomputation-bound programshigh-speed multiprocessorinterconnection networkmultiprocessor designparallel processingpipelining

Mathematics Subject Classification ID

Theory of operating systems (68N25) Applications of graph theory to circuits and networks (94C15)

Cited in

(4)

• \(Booster\): A high-level language for portable parallel algorithms
• A strategy for array management in local memory
• Exploiting parallelism on a fine-grained MIMD architecture based upon channel queues
• A profile-based tool for finding pipeline parallelism in sequential programs

This page was built for publication: High-Speed Multiprocessors and Compilation Techniques

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3880778)