ICS
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ICS Q33420
Cited in
(35)- Preface to the special issue ``SI: satisfiability modulo theories
- Generalizing DPLL and satisfiability for equalities
- Efficient theory combination via Boolean search
- Verifying a signature architecture: a comparative case study
- A survey on temporal logics for specifying and verifying real-time systems
- Analyzing automata with Presburger arithmetic and uninterpreted function symbols
- An integrated approach to high integrity software verification
- Design and results of the first satisfiability modulo theories competition (SMT-COMP 2005)
- Automated Deduction – CADE-20
- A framework for satisfiability modulo theories
- HaifaSat
- QOCA
- CVC Lite
- CVC
- CVT
- Tempo
- RSat
- EVC
- Omega
- STeP
- DCVALID
- IDLVALID
- Modechart
- C32SAT
- QAGen
- Zapato
- Z34Bio
- Building small equality graphs for deciding equality logic with uninterpreted functions
- Delayed theory combination vs. Nelson-Oppen for satisfiability modulo theories: a comparative analysis
- Embedded software verification using symbolic execution and uninterpreted functions
- M\textbf{ath}SAT: Tight integration of SAT and mathematical decision procedures
- Variant-Based Satisfiability in Initial Algebras
- Decision procedures. An algorithmic point of view
- Translation and run-time validation of loop transformations
- Bounded model checking for timed automata
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