Implementation of matrix multiplication on the T-RACK

DOI10.1016/0167-8191(90)90111-LMaRDI QIDQ753425zbMATH OpenOpenAlexFDO

Authors J. J. Modi, Theoharis Theoharis

Publication date 1990

Published in Parallel Computing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/0167-8191(90)90111-l

zbMATH Keywords

algorithmblock partitioning methodcomputation and communication complexitymatrix multiplicationMIMD computers

Mathematics Subject Classification ID

Numerical algorithms for specific classes of architectures (65Y10) Complexity and performance of numerical algorithms (65Y20) Analysis of algorithms and problem complexity (68Q25)

Review text

This short communication analyzes a block partitioning method for implementing matrix multiplication on an MIMD architecture. The authors discuss the computation and communication complexity of their algorithm and give a detailed description of their implementation. The note concludes with performance figures measured on a 64 transputer system.

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Cited in

(3)

• scientific article; zbMATH DE number 524112 (Why is no real title available?)
• scientific article; zbMATH DE number 823632 (Why is no real title available?)
• OPTIMIZING THE MATRIX MULTIPLICATION PARALLEL ALGORITHMS ON A DISTRIBUTED-MEMORY MIMD MULTIPROCESSOR

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