VLSI array processors' block implementation of IIR digital filters (Q1115837)

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VLSI array processors' block implementation of IIR digital filters
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    VLSI array processors' block implementation of IIR digital filters (English)
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    1988
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    The paper concerns the block realization of infinite impulse response (IIR) digital filters suitable for implementation in very large scale integration techniques. The output point is \textit{C. S. Burrus}' [IEEE Trans. Audio Electroacoust. AU-20, No.4, 230-235 (1972)] difference matrix equation, which has been processed to a form suitable for implementation by array processors. Two means of implementation are described - by systolic and by wavefront arrays. Throughput rates and processing delays latency for both filter architectures are calculated, and it is shown that the proposed filter structures achieve the maximum possible throughput rate value which is a linear function of the processed block length. The latency for both cases increases with the square of the block length and is smaller for the wavefront array structure than for the systolic array structure.
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    block realization
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    infinite impulse response (IIR) digital filters
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    very large scale integration
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    array processors
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    systolic
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    wavefront
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    time-invariant
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