Robust design for disturbance rejection in time delay systems (Q1358694)

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Robust design for disturbance rejection in time delay systems
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    Robust design for disturbance rejection in time delay systems (English)
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    3 July 1997
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    An open loop system with delays and an input disturbance of the form \[ Y(s)= P_2(s)(P_1(s)+ D(s))U(s) \] is considered and a feedback system of the form \(U(s)= -C(s)\) is proposed, where \[ C(s)= {1\over P_1(s)} \Biggl({1\over A(s)}- {1\over P_2(s)}\Biggr), \] where \(A(s)\) is a disturbance reference model. This controller, however, is predictive and may have unstable poles; the purpose of the paper is to show that an appropriate \(A(s)\) can be chosen to give a stable, realizable controller.
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    robust control
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    disturbance rejection
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    stable controller
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    delays
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