Processor array synthesis from shift-variant deep nested Do loops (Q1402301)
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| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Processor array synthesis from shift-variant deep nested Do loops |
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Processor array synthesis from shift-variant deep nested Do loops (English)
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20 August 2003
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reconfigurable computing
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FPGA
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nested loop
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systolic mapping
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motion estimation
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