Upper bound on the number of processors for scheduling with interprocessor communication delays. (Q1403166)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 1972731
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Upper bound on the number of processors for scheduling with interprocessor communication delays. |
scientific article; zbMATH DE number 1972731 |
Statements
Upper bound on the number of processors for scheduling with interprocessor communication delays. (English)
0 references
2000
0 references
scheduling
0 references
makespan
0 references
communication delays
0 references
minimum number of processors
0 references
0.9088103771209716
0 references
0.8174502849578857
0 references
0.8173812031745911
0 references
0.8121373057365417
0 references
0.8118961453437805
0 references
