Upper bound on the number of processors for scheduling with interprocessor communication delays.

DOI10.1007/S001860000062MaRDI QIDQ1403166zbMATH OpenOpenAlexFDO

Authors A. Moukrim

Publication date 2000

Published in Mathematical Methods of Operations Research (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s001860000062

zbMATH Keywords

schedulingmakespancommunication delaysminimum number of processors

Mathematics Subject Classification ID

Deterministic scheduling theory in operations research (90B35) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

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Cited in

(3)

• Processor-Ring Communication: A Tight Asymptotic Bound on Packet Waiting Times
• A note on Graham's bound
• Minimizing the number of machines for minimum length schedules

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