Logic synthesis method for power dissipation reduction in combinational digital circuits (Q1596528)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 1743946
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Logic synthesis method for power dissipation reduction in combinational digital circuits |
scientific article; zbMATH DE number 1743946 |
Statements
Logic synthesis method for power dissipation reduction in combinational digital circuits (English)
0 references
22 May 2002
0 references
low power design
0 references
switching activity reduction
0 references
logic synthesis
0 references
multiobjective optimization
0 references
power dissipation
0 references
combinational digital VLSI circuits
0 references
0.7758092284202576
0 references
0.7422720193862915
0 references
0.7303451299667358
0 references