A methodology for speeding up loop kernels by exploiting the software information and the memory architecture (Q1749110)
From MaRDI portal
 | This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: A methodology for speeding up loop kernels by exploiting the software information and the memory architecture |
scientific article; zbMATH DE number 6868737
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | A methodology for speeding up loop kernels by exploiting the software information and the memory architecture |
scientific article; zbMATH DE number 6868737 |
Statements
A methodology for speeding up loop kernels by exploiting the software information and the memory architecture (English)
0 references
15 May 2018
0 references
data reuse
0 references
register allocation
0 references
optimization
0 references
memory hierarchy
0 references
loop tiling
0 references
data locality
0 references
Diophantine equations
0 references
0 references
0 references
0.7437490820884705
0 references
0.7192214727401733
0 references
0.7079562544822693
0 references
0.6979401707649231
0 references
0.6898159384727478
0 references
