Formal synthesis of closed-form sampled-data controllers for nonlinear continuous-time systems under STL specifications (Q2116657)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 7492906
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Formal synthesis of closed-form sampled-data controllers for nonlinear continuous-time systems under STL specifications |
scientific article; zbMATH DE number 7492906 |
Statements
Formal synthesis of closed-form sampled-data controllers for nonlinear continuous-time systems under STL specifications (English)
0 references
18 March 2022
0 references
achievable controller performance
0 references
optimal controller synthesis for systems with uncertainties
0 references
formal controller synthesis
0 references
temporal logic
0 references
reachability analysis
0 references
0 references
0 references
0 references
0.8297234773635864
0 references
0.7905694246292114
0 references
0.7791869640350342
0 references
0.7725169062614441
0 references
0.7571558952331543
0 references
