Formal synthesis of closed-form sampled-data controllers for nonlinear continuous-time systems under STL specifications (Q2116657)

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Formal synthesis of closed-form sampled-data controllers for nonlinear continuous-time systems under STL specifications
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    Formal synthesis of closed-form sampled-data controllers for nonlinear continuous-time systems under STL specifications (English)
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    18 March 2022
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    achievable controller performance
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    optimal controller synthesis for systems with uncertainties
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    formal controller synthesis
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    temporal logic
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    reachability analysis
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