Performance of a new split digital phase lock loop in additive wideband Gaussian noise (Q2874388)
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scientific article; zbMATH DE number 6252074
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| default for all languages | No label defined |
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| English | Performance of a new split digital phase lock loop in additive wideband Gaussian noise |
scientific article; zbMATH DE number 6252074 |
Statements
Performance of a new split digital phase lock loop in additive wideband Gaussian noise (English)
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30 January 2014
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digitally controlled oscillator (DCO)
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digital phase lock loop (DPLL)
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split-loop DPLL
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noise bandwidth
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DCO with phase modulation
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signal-to-noise ratio (SNR)
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BER
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field programmable gate array (FPGA)
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0.7640235424041748
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0.7640235424041748
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0.7467137575149536
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0.7442270517349243
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0.7382549047470093
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