Optimal design of the feedback shift register based on the general-purpose reconfigurable processor (Q3132285)
From MaRDI portal
| This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: Optimal design of the feedback shift register based on the general-purpose reconfigurable processor |
scientific article; zbMATH DE number 6831718
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Optimal design of the feedback shift register based on the general-purpose reconfigurable processor |
scientific article; zbMATH DE number 6831718 |
Statements
29 January 2018
0 references
general-purpose reconfigurable processor
0 references
feedback shift register
0 references
A5 algorithm
0 references
stream cipher algorithm optimization
0 references
0.7760840058326721
0 references
0.6980629563331604
0 references
0.697187602519989
0 references
0.6949030160903931
0 references