Optimal design of the feedback shift register based on the general-purpose reconfigurable processor
From MaRDI portal
Publication:3132285
DOI10.14188/J.1671-8836.2017.02.006zbMATH Open1389.94091MaRDI QIDQ3132285FDOQ3132285
Authors: Haiyang Zhang, Xuehui Du, Zhiyu Ren, Yu-Han Chen
Publication date: 29 January 2018
Recommendations
- Design of a reconfigurable parallel nonlinear feedback shift register structure targeted at stream cipher
- Design and analysis of a highly secure stream cipher based on linear feedback shift register
- Optimizing a fast stream cipher for VLIW, SIMD, and superscalar processors
- scientific article; zbMATH DE number 1878340
- On increasing the throughput of stream ciphers
feedback shift registerA5 algorithmgeneral-purpose reconfigurable processorstream cipher algorithm optimization
Cryptography (94A60) Shift register sequences and sequences over finite alphabets in information and communication theory (94A55)
Cited In (1)
This page was built for publication: Optimal design of the feedback shift register based on the general-purpose reconfigurable processor
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3132285)