Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition (Q3311705)
From MaRDI portal
 | This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition |
scientific article; zbMATH DE number 3841270
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition |
scientific article; zbMATH DE number 3841270 |
Statements
Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition (English)
0 references
1984
0 references
Earley's algorithm
0 references
error-correcting recognition
0 references
parallel CFL parsing
0 references
parallel CFL recognition
0 references
parsing matrix
0 references
syntactic pattern recognition
0 references
VLSI array
0 references
