An analytical model for Network-on-Chip with finite input buffer (Q352048)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 6183867
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | An analytical model for Network-on-Chip with finite input buffer |
scientific article; zbMATH DE number 6183867 |
Statements
An analytical model for Network-on-Chip with finite input buffer (English)
0 references
4 July 2013
0 references
analytical model
0 references
finite buffer
0 references
Network-on-Chip (NoC)
0 references
queue system
0 references
0.7585639953613281
0 references
0.7497177720069885
0 references
0.728935182094574
0 references
0.7160556316375732
0 references
0.7156103253364563
0 references
