Input mapping algorithm for parallel transistor structures (Q3563567)
From MaRDI portal
| This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: Input mapping algorithm for parallel transistor structures |
scientific article; zbMATH DE number 5714413
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Input mapping algorithm for parallel transistor structures |
scientific article; zbMATH DE number 5714413 |
Statements
Input mapping algorithm for parallel transistor structures (English)
0 references
31 May 2010
0 references
analytical models
0 references
CMOS gates
0 references
input mapping algorithm
0 references
parallel structure
0 references
0.6908239126205444
0 references
0.6757655143737793
0 references
0.664970338344574
0 references