RTL verification of timed asynchronous and heterogeneous systems using symbolic model checking (Q3840911)

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scientific article; zbMATH DE number 1190113
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    RTL verification of timed asynchronous and heterogeneous systems using symbolic model checking
    scientific article; zbMATH DE number 1190113

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      RTL verification of timed asynchronous and heterogeneous systems using symbolic model checking (English)
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      13 August 1998
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      register transfer level verification
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      symbolic model checking
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      asynchronous circuits
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      timing assumptions
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      time discretization
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