Code construction and FPGA implementation of a low-error-floor multi-rate low-density Parity-check code decoder (Q4590538)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 6810038
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Code construction and FPGA implementation of a low-error-floor multi-rate low-density Parity-check code decoder |
scientific article; zbMATH DE number 6810038 |
Statements
Code construction and FPGA implementation of a low-error-floor multi-rate low-density Parity-check code decoder (English)
0 references
20 November 2017
0 references