Multi-core processor scheduling with respect to data bus bandwidth (Q6130872)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 7827239
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Multi-core processor scheduling with respect to data bus bandwidth |
scientific article; zbMATH DE number 7827239 |
Statements
Multi-core processor scheduling with respect to data bus bandwidth (English)
0 references
3 April 2024
0 references
multi-core processor
0 references
data bus
0 references
scheduling
0 references
greedy algorithm
0 references
mixed integer linear programming
0 references
0.7400298714637756
0 references
0.7339723706245422
0 references
0.7334462404251099
0 references
