Multi-core processor scheduling with respect to data bus bandwidth

DOI10.1007/978-3-030-65739-0_5MaRDI QIDQ6130872zbMATH OpenOpenAlexFDO

Authors Anton Valentinovich Eremeev, Anton A. Malakhov, Maxim A. Sakhno, Maria Y. Sosnovskaya

Publication date 3 April 2024

Published in Communications in Computer and Information Science (Search for Journal in Brave)

Full work available at URL https://arxiv.org/abs/2010.16058

zbMATH Keywords

data busgreedy algorithmmixed integer linear programmingmulti-core processorscheduling

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Deterministic scheduling theory in operations research (90B35) Mixed integer programming (90C11)

Abstract: The paper considers the problem of scheduling software modules on a multi-core processor, taking into account the limited bandwidth of the data bus and the precedence constraints. Two problem formulations with different levels of problem-specific detail are suggested and both shown to be NP-hard. A mixed integer linear programming (MILP) model is proposed for the first problem formulation, and a greedy algorithm is developed for the second one. An experimental comparison of the results of the greedy algorithm and the MILP solutions found by CPLEX solver is carried out.

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Cites work

• Coke production scheduling problem: a parallel machine scheduling with batch preprocessings and location-dependent processing times
• scientific article; zbMATH DE number 3639144 (Why is no real title available?)
• scientific article; zbMATH DE number 1534501 (Why is no real title available?)
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• The maximum concurrent flow problem

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