A framework for solving VLSI graph layout problems (Q796306)
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scientific article; zbMATH DE number 3864517
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
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| English | A framework for solving VLSI graph layout problems |
scientific article; zbMATH DE number 3864517 |
Statements
A framework for solving VLSI graph layout problems (English)
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1984
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divide-and-conquer framework for VLSI graph layout
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layout area
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propagation delay
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large networks of processors
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faulty processors
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graph partitioning heuristics
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0.90699565
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0.90421104
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0.8938226
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0.89004326
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0.88462573
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