Generalized low-voltage circuit techniques for very high-speed time-interleaved analog-to-digital converters (Q983254)

This book is devoted to the study of interleaved Analog-to-Digital Converters (ADCs) and presents new techniques tailored for low-voltage and high-speed Switched-Capacitor (SC) ADC with various design-specific considerations. It has seven chapters. Chapter 1, ``Introduction'' includes an overview of the introductory aspects of the state-of-the-art low-voltage high-speed ADC designs and Chapter 2, ``Challenges in Low-Voltage Circuit Designs'' discusses the impact of the CMOS technology scaling in the design of analog circuits, at the device level, with the degradation of both the intrinsic gain and the speed of deep-submicron transistors. At circuit level, it presents the design challenges due to the reduction in the analog supply voltage, which leads to the problems of floating switches and of reduced voltage headroom for low-voltage opamps. Current solutions to these issues are also discussed. Chapter 3, ``Advanced Low Voltage Circuit Techniques'' presents practical considerations of switched-capacitor circuits design within a low-voltage environment, e. g. the common-mode feedback circuits, front-end input interfaces to continuous-time input signal, level-shifting techniques, process-insensitive biasing as well as gain-and-offset compensation. Chapter 4, ``Time-Interleaving: Multiplying the Speed of the ADC'' introduces the concept of Time-Interleaving (TI) which represents an efficient solution for designing very-high-speed circuits and systems under the speed limitations imposed by the technology. Since channel mismatches severely limit the system performance, four different kinds of mismatches are thoroughly analyzed and discussed. Closed-form spectrum expressions, as well as the Signal-to-Noise-and-Distorsion Ratio are derived for a simplified analysis of the performance of time-interleaved systems under various channel mismatches. Chapter 5, ``Design of a 1.2 V, 10-bit, 60-360 MHz Time-Interleaved Pipelined ADC'' presents a low-voltage reconfigurable time-interleaved analog-to-digital converter which is implemented in CMOS technology. Design considerations about the various ADC's circuit building blocks are also addressed. Chapter 6, ``Experimental Results'' illustrates the Printed-Circuit Board (PCB) design that supports the experimental testing setup, and presents measured results of the prototype ADC chip described in Chapter 5. A comparison with previously reported low-voltagwe high-speed ADCs are also provided. Chapter 7, ``Conclusions and Prospective for Future Work'' finally draws the relevant concluding remarks of this book and proposes prospective future research works. Four appendices introduce the operation principle of the proposed common-mode feedback techniques, the mathematical derivation for the SNDR of the bandwidth mismatch in TI-ADCs, the estimation of noise performance in various building blocks of advanced reset-opamp circuits and a mathematical anlysis and proof of the special case of gain-mismatch analysis presented in the measurement results of Chapter 6.