LFSR-based Bit-Serial GF(2ᵐ) Multipliers using Irreducible Trinomials

DOI10.1109/TC.2020.2980259MaRDI QIDQ5140211zbMATH OpenOpenAlexFDO

Authors José Luis Imaña

Publication date 14 December 2020

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.2020.2980259

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

Cited in

(3)

• scientific article; zbMATH DE number 1941247 (Why is no real title available?)
• A VLSI design for computing exponentiations in GF(2/sup m/) and its application to generate pseudorandom number sequences
• A new bit-serial multiplier over GF(pm) using irreducible trinomials

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