Mapping affine loop nests
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Recommendations
- Mapping uniform loop nests onto distributed memory architectures
- Compiling affine nested loops: How to optimize the residual communications after the alignment phase
- Mapping of affine loop nests onto independent processors
- Distribution of operations and data arrays over processors
- A consistent generation of pipeline parallelism and distribution of operations and data among processors
Cited in
(13)- Mapping uniform loop nests onto distributed memory architectures
- Mapping loop nests to multipipelined architecture
- Optimization of data exchange in parallel computers with distributed memory
- A consistent generation of pipeline parallelism and distribution of operations and data among processors
- Quantifier elimination in automatic loop parallelization
- Mapping of affine loop nests onto independent processors
- Automatic array partitioning based on the Smith normal form
- Sufficient conditions for the determination and use of data in the same granular parallel computation process
- Three mapping loop strategies for the upper diagonal matrix-vector product
- Parallelization of sequential programs: distribution of arrays among processors and structurization of communications
- Communication-Minimal Partitioning and Data Alignment for Affine Nested Loops
- scientific article; zbMATH DE number 2079651 (Why is no real title available?)
- Compiling affine nested loops: How to optimize the residual communications after the alignment phase
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