Minimum-Area Wiring for Slicing Structures

DOI10.1109/TC.1987.1676967MaRDI QIDQ3770455zbMATH OpenFDO

Authors

Publication date 1987

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TC.1987.1676967

zbMATH Keywords

macrosoptimal wiringslicing floorplanVLSI circuitswiring algorithm

Mathematics Subject Classification ID

Applications of graph theory to circuits and networks (94C15)

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