Network flow based buffer planning

DOI10.1016/S0167-9260(01)00015-3MaRDI QIDQ2778432zbMATH OpenFDO

Authors Xiaoping Tang, D. F. Wong

Publication date 3 March 2002

Published in Integration. The VLSI Journal (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/S0167-9260(01)00015-3

zbMATH Keywords

buffer insertionbuffer planningCADnetwork flowVLSI

Mathematics Subject Classification ID

Nonnumerical algorithms (68W05)

Recommendations

• Efficient algorithms for buffer space allocation
• Theory and practice of VLSI placement
• Buffer planning for application-specific networks-on-chip design
• Non-interfering network flows
• A buffer minimization problem for the design of embedded systems

Cited in

(2)

• Buffer planning for application-specific networks-on-chip design
• Minimum inserted buffers for clock period minimization

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