On the complexity of fanout-bounded parallel prefix circuits

DOI10.33048/DAIO.2024.31.791MaRDI QIDQ6944600zbMATH OpenFDO

Authors I. S. Sergeev

Publication date 12 August 2025

Published in Diskretnyĭ Analiz i Issledovanie Operatsiĭ (Search for Journal in Brave)

Full work available at URL https://doi.org/10.33048/DAIO.2024.31.791

zbMATH Keywords

circuit complexitycircuit depthfanout-bounded circuitparallel prefix circuit

Mathematics Subject Classification ID

Networks and circuits as models of computation; circuit complexity (68Q06) Switching theory, applications of Boolean algebras to circuits and networks (94C11)

Cites work

• A Parallel Algorithm for the Efficient Solution of a General Class of Recurrence Equations
• A Regular Layout for Parallel Adders
• Boolean function complexity. Advances and frontiers.
• Depth-size trade-offs for parallel prefix computation
• Minimal parallel prefix circuits
• Optimal Metastability-Containing Sorting via Parallel Prefix Computation
• Parallel Prefix Computation

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