Operand Folding Hardware Multipliers

DOI10.1007/978-3-642-28368-0_21MaRDI QIDQ2889774zbMATH OpenOpenAlexFDO

Authors Byungchun Chung, Sandra Marcello, Amir-Pasha Mirbaha, David Naccache, Karim Sabeg

Publication date 8 June 2012

Published in Cryptography and Security: From Theory to Applications (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-642-28368-0_21

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

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Cited in

(5)

• A 16-bit by 16-bit MAC design using fast 5:3 compressor cells
• A New Operator for Multi-addition Calculations
• A new design technique for column compression multipliers
• Formal Methods in Computer-Aided Design
• Multiple Operand Addition and Multiplication

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