Optimal VLSI sorting with reduced number of processors

DOI10.1109/12.67326MaRDI QIDQ5375385zbMATH OpenOpenAlexFDO

Authors V. K. Prasanna Kumar, H. M. Alnuweiri

Publication date 14 September 2018

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/12.67326

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07) Searching and sorting (68P10) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cited in

(5)

• A VLSI algorithm for sorting variable-length character strings
• Processor-time optimal parallel algorithms for digitized images on mesh- connected processor arrays
• VLSI Sorting with Reduced Hardware
• Optimal VLSI circuits for sorting
• A time-space optimal parallel sorting on a hypercube

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