A VLSI algorithm for sorting variable-length character strings

DOI10.1007/BF03037124MaRDI QIDQ1079374zbMATH OpenFDO

Authors Yuzuru Tanaka

Publication date 1985

Published in New Generation Computing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/BF03037124

zbMATH Keywords

character string processingparallel processingpipelined heap sort algorithmsorting hardware moduleVLSI archictecture

Mathematics Subject Classification ID

Searching and sorting (68P10)

Recommendations

• A fast VLSI solution for approximate string matching
• VLSI Sorting with Reduced Hardware
• Optimal VLSI circuits for sorting
• Optimal VLSI sorting with reduced number of processors
• scientific article; zbMATH DE number 1555948
• VLSI-sorting evaluated under the linear model
• On demand string sorting over unbounded alphabets
• On Demand String Sorting over Unbounded Alphabets
• An Architecture for Bitonic Sorting with Optimal VLSI Performnance

Cites work

• Algorithm and Hardware for a Merge Sort Using Multiple Processors
• Bitonic Sort on a Mesh-Connected Parallel Computer
• Bounds to Complexities of Networks for Sorting and for Switching
• Fast parallel sorting algorithms
• New Parallel-Sorting Schemes
• Optimal Sorting Algorithms for Parallel Computers
• Parallel Processing with the Perfect Shuffle
• Sorting on a mesh-connected parallel computer

Cited in

(1)

• VLSI Sorting with Reduced Hardware

This page was built for publication: A VLSI algorithm for sorting variable-length character strings

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q1079374)