Pareto optimal mapping for tile-based network-on-chip under reliability constraints

DOI10.1080/00207160.2014.892073MaRDI QIDQ4983268zbMATH OpenOpenAlexFDO

Authors Qianqi le, Guowu Yang, William N. N. Hung, Xiaoyu Song, Xinpeng Zhang

Publication date 25 March 2015

Published in International Journal of Computer Mathematics (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1080/00207160.2014.892073

zbMATH Keywords

mappingnetwork-on-chipoptimization algorithmparticle swarm optimizationreliability

Mathematics Subject Classification ID

Problem solving in the context of artificial intelligence (heuristics, search strategies, etc.) (68T20) Randomized algorithms (68W20) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Analysis of algorithms (68W40)

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Cites work

• A study of particle swarm optimization particle trajectories
• New polynomial time algorithms to compute a set of Pareto optimal paths for multi-objective shortest path problems
• Using quantum-behaved particle swarm optimization algorithm to solve non-linear programming problems

Cited in

(5)

• Efficient genetic based topological mapping using analytical models for on-chip networks
• Bio-inspired NoC architecture optimization
• An optimized test ports selecting method under power constraint in NoC
• Fault-aware communication mapping for noCs with guaranteed latency
• Designing reliable and efficient networks on chips

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